1. Field of the Invention
The present invention relates to a semiconductor device for a semiconductor integrated circuit and its manufacturing method.
2. The Related Art
FIG. 1 shows the wiring portion of a semiconductor device having a multi-layer wiring structure using a conventional interlayer insulating film. In FIG. 1, a lower wiring layer 401 is formed on a semiconductor substrate 400 into a desired shape by evaporation and patterning. An interlayer insulating film 402 is then deposited by, for example, CVD method and the surface of the interlayer insulating film 402 is subjected to planarization by etching or the CMP method. Thereafter, an upper wiring layer 403 is formed on the interlayer insulating film 402 into a desired shape by evaporation and patterning.
According to a method shown by Japanese Patent Laid-Open Application No. 5-283542, referring to FIG. 2, a lower wiring layer 501 is formed on a semiconductor substrate 500. A cap insulating film 504 is then formed on the semiconductor substrate 500 and the lower wiring layer 501. An interlayer insulating film 502 including glass coating material mixed with Al grains of sub-micron diameter is applied onto the cap insulating film 504. The interlayer insulating film 502 is heated to about 400.degree. C. and formed into glass. Thereafter, only Al attaching to the glass coating material is selectively etched to thereby form holes 505 within the interlayer insulating film 502. A second cap insulating film 506 is then formed on the interlayer insulating film 502 to form an upper wiring layer 503.
The related art shown in FIG. 1, however, is disadvantageous in that high-speed operation is difficult to realize because the circuit operation speed is controlled by wiring capacity. The reason is that the interlayer insulating film 402 has a material-peculiar dielectric constant and its capacitance is higher than that of air with the result that high-speed operation is prevented.
The related art shown in FIG. 2 is also disadvantageous in that it is difficult to form holes 505 within the interlayer insulating film 502. The reason is that it is difficult to remove Al grains selectively. In order to remove Al grains well, it is necessary for Al grains to mix into the coating material without being separated from each other by the coating material. If grains are separated from each other by the coating material selective etching cannot be achieved because the coating material prevents Al grains for being etched.